In recent years, silicon carbide has been increasingly employed as a material forming a semiconductor device in order to allow for a higher breakdown voltage, lower loss, the use in a high-temperature environment and the like of the semiconductor device.
A silicon carbide substrate is manufactured with a sublimation-recrystallization method, for example. However, a silicon carbide substrate usually includes dislocations. It is extremely difficult at the present time to manufacture a silicon carbide substrate completely free of dislocations. Japanese Patent Laying-Open No. 2013-34007 (PTD 1) discloses a silicon carbide epitaxial wafer in which step bunching coupled to shallow pits resulting from screw dislocations in a silicon carbide epitaxial layer has a linear density of 5 mm−1.
Makoto Kitabatake and eight others, “Electrical Characteristics Reliability Affected by Defects Analyzed by the Integrated Evaluation Platform for SiC epitaxial films,” Materials Science Forum, 2014, Vols. 778-780, p. 979-984 (NPD 1) discloses a method of evaluating electrical characteristics and reliability affected by defects preset in a silicon carbide epitaxial film.